OperaHW chipset

Address Space

• 0x00000000 - 0x001FFFFF -- DRAM (2MB), accessible by CPU and DMA
• 0x00200000 - 0x002FFFFF -- VRAM (1MB), accessible by CPU, CEL and VDLP
• 0x03000000 - 0x030FFFFF -- ROM (1MB), contains bootloader, copy of OperaOS, and few usefull programms, such as CD player
• 0x03140000 - 0x0315FFFF -- NVRAM (32KB), sparced by aligning every byte to 32 bits boundary
• 0x03200000 - 0x032FFFFF -- SPORT - this is special feauture of VRAM, allowing to COPY or FILL VRAM pages (512 bytes) without CPU usage. Can be used with byte mask, allowing to create unique effects.
• 0x03300000 - 0x033FFFFF -- MADAM
• 0x03400000 - 0x034FFFFF -- CLIO

MADAM registers

legend: (R) == read access, (W) == write access, (RO) == read only access, (WO) == writeonly access

• 0x03300000 --
  • (R) MADAM revision number with features coded in 32 bit word
  • (W) Some sort of debug port -- all kprintf's are printing characters to this port

• 0x03300004 -- Memory configuration (RO)
  • default value is 0x29 (2mb DRAM, 1mb VRAM)

• 0x03300008 -- DMA enable (RW)
  • (W) -- 0x8000 enables PBUS DMA Transfer

• 0x03300020 -- CPU Abort reason (RO)
  • 0 -- ROM Failure
  • 1 -- ROM Write
  • 2 -- CLIO Timeout
  • 3 -- User access to hardware
  • 4 -- User access to SYSRAM (lower 64KB of DRAM)
  • 5 -- FENCE Violation -- Memory Protect error
  • 6 -- Virtual Page Error
  • 7 -- Out of 26bit address range
  • 8 -- SPORT while SC
  • 9 -- Byte access to hardware
  • 10 -- bad address detected
  • 11 -- ARM access to PPROC while CEL is working
  • 12 -- Byte address - word access. (unaligned 32bit access)

• 0x03300024 -- DMA Priv. violation (RO) -- DMA error description
  • 0x01 -- DMA access to SYSRAM
  • 0x02 -- SPORT access to SYSRAM
  • 0x04 -- CEL access to SYSRAM
  • 0x08 -- DMA access over VRAMSIZE
  • 0x10 -- SPORT access over VRAMSIZE
  • 0x20 -- CEL access over VRAMSIZE
  • 0x40 -- CEL math failure

• 0x03300028 CEL STATBITS (RO)
  • 0x10 -- SPRON
  • 0x20 -- SPRPAU

• 0x03300100 CEL SPRSTRT (WO)
• 0x03300104 CEL SPRSTOP (WO)
• 0x03300108 CEL SPRCNTU (WO)
• 0x0330010C CEL SPRPAUS (WO)
• 0x03300110 CEL CCBCTL0 (RW)
• 0x03300130 CEL REGCTL0 (RW)
• 0x03300134 CEL REGCTL1 (RW)
• 0x03300138 CEL REGCTL2 (RW)
• 0x0330013C CEL REGCTL3 (RW)

--FENCE Memory protection

• 0x03300230 0L
• 0x03300234 0R
• 0x03300238 1L
• 0x0330023C 1R
• 0x03300270 2L
• 0x03300274 2R
• 0x03300278 3L
• 0x0330027C 3R

--CPU2DSP DMA group

Array of structures (RW)

typedef struct{
    unsigned int curaddr; // current address
    unsigned int curlen;  // current length
    unsigned int nextaddr; // next address
    unsigned int nextlen; // next length
    }dspdma_stc;

• 0x03300400 dspdma_stc for chan 0
• 0x03300410 dspdma_stc for chan 1
• 0x03300420 dspdma_stc for chan 2
• 0x03300430 dspdma_stc for chan 3
• 0x03300440 dspdma_stc for chan 4
• 0x03300450 dspdma_stc for chan 5
• 0x03300460 dspdma_stc for chan 6
• 0x03300470 dspdma_stc for chan 7
• 0x03300480 dspdma_stc for chan 8
• 0x03300490 dspdma_stc for chan 9
• 0x033004A0 dspdma_stc for chan 10
• 0x033004B0 dspdma_stc for chan 11
• 0x033004C0 dspdma_stc for chan 12